Engr Shabeer
Level 2
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Analog IC design Engineer
Epic • Fulltime
Apr 2022 - Jun 2026 • 4 yrs 2 mos
**Analog Design Engineer** **CMOS Analog IC Design & Circuit Simulation** Designed and analyzed transistor-level analog circuits using CMOS technology. Experienced in Cadence Virtuoso for schematic design, simulation, and layout of analog and mixed-signal circuits. Key experience: * CMOS inverter, transmission gate, flip-flop, and analog building block design including OPAMP, BGR, LDO, ADC, DAC & PLL etc * Transistor-level schematic development and simulation * from 180 to 14 nm CMOS technology-based circuit design * Analog circuit analysis, optimization, and troubleshooting * Layout design with DRC/LVS verification concepts * SPICE simulation and performance evaluation Worked on analog/mixed-signal VLSI design projects involving schematic capture, simulation, and physical design flow.
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marcarnault

Japan
I had a difficult task that I wanted done but also wanted to learn with. Engr Shabeer was more than helpful and was willing to provide answers to any questions
alyasser1

Canada

sleepyshaman3

Israël
I had an excellent experience working with Shabeer! He designed a circuit for me with incredible precision and expertise. Communication was smooth, and he took the time to understand my requirements perfectly. The final design was not only efficient but also well-documented and optimized for my application....
abdulaziz_004

Verenigde Arabische Emiraten
He was exceptional and did what we asked for even if there were some small notes to change
natasharkhan

Verenigde Staten
Engr Shabeer is great at what he does! Highly recommended

