Nitin K

@vnith1

VLSI and FPGA Engineer: RTL to GDS, RTL Design, DSP, RISCV

India

Engels, Hindi, Kannada

Sommige informatie wordt in het Engels weergegeven.

Over mij

I am an IIT M.Tech graduate in VLSI with 10+ years of experience in VLSI design, FPGA development, RTL implementation and semiconductor workflows. Skilled in Verilog/SystemVerilog, FPGA, DSP, RISC-V, AI/ML hardware acceleration, RTL-to-GDS flow, Python/TCL scripting and EDA tools commercial tools and open source tools. I provide support for RTL coding, FPGA implementation, debugging, simulation, DSP architectures, IEEE projects, research guidance and implementation-oriented semiconductor solutions.... Lees meer

Skills